LCD PC

LCD(TN141X7) and MF/Rage/Mobile Celeron600 Mather Connection Table

LCDpin (JAE 20pin  Connector)	LCD signal	MF Mather pin  (120pin Connector)	Notice
1,2	Power Supply 3.3V	78（LCDVCC)	(1),(2)
3,4	Ground	（MF Mather GND)	(1)
5	LVDS Data of 0 M(-)	72	Twist Pair Data 0M and 0P (3)
6	LVDS Data of 0 P(+)	71
7	Ground
8	LVDS Data of 1 M(-)	69	Twist Pair Data 1M and 1P (3)
9	LVDS Data of 1 P(+)	68
10	Ground
11	LVDS Data of 2 M(-)	66	Twist Pair Data 2M and 2P (3)
12	LVDS Data of 2 P(+)	65
13	Ground
14	LVDS Clock of M(-)	63	Twist Pair  Clock M and P  (3)
15	LVDS Clock of P(+)	62
16,19,20	Ground
17,18	N.C.

Notice(1) Attention Line Drop. (LCD Power Sunpply MIN.3.0V at Ground)
Notice(2) LCDVCC  becomes disable by Mather power save.
Notice(3) All 4 pairs of LVDS signals be connected by the same length  between LCD and Mather board.
 

About setup of 120pin connector for SingleLVDS XGA LCD

Mather pin  (120pin Connector)	MF Mather Connection	Notice
79	Connect to GND	If not connect,Mather LCDVCC is disable.

 

Inverter(CA46010-1639/CP021040) and MF Mather Connection Table

Inverter (8pin)	Inverter Signal	MF Mather pin (120pin Connector)	Notice
1,2	VCC	3-10(DCIN+16V)	Mather Suppley Voltage
3,4	Enable	(Connect to 5V)
6,7	Ground	（MF Mather GND)
5,8	N.C.

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上は、LVDS入力のLCDとマザーの接続関係を示しています。
マザーのモニタ出力サブボードコネクタのピンアサイン記述はこちら。